Job Summary

Locations:

Bengaluru / Bangalore

Experience:

6 – 12 years

Keywords / Skills :

DFT, SCAN, MBIST, JTAG, ATE, DRC, ATPG, BIST, BSCAN

Function:

• IT
• Telecom/ ISP

Role:

• Team Leader/ Technical Leader
• Project Leader/ Project Manager
• Hardware Design Engineer
• Hardware Design Technical Leader

Industry:

• IT/ Computers – Hardware
• IT/ Computers – Software
• Telecom
• Semiconductor

Summary:

AppliedMicro is an innovative global leader in system-on-a-chip semiconductors for high-speed communications and high-performance embedded Processing.Responsible for achieving high SCAN coverage and low DPPM.Responsible for SCAN, MBIST and JTAG

Posted On:

27th Mar 2016

Staff / Senior Staff -DFT Engineer

Job Description:

The selected candidate will be an individual contributor who is responsible for SCAN, MBIST and JTAG implementation, verification, vector generation and ATE post-silicon debug for complex 40nm and 28nm Transport products.
Experience Level:

6-12 years of relevant DFT experience
Responsibilities:

Responsible for JTAG implementation and verification.
Responsible for MBIST implementation and verification.
Responsible for SCAN insertion and DRC analysis/debug.
Responsible for achieving high SCAN coverage and low DPPM.
Responsible for SCAN, MBIST and JTAG gate-level simulations.
Responsible for ATPG vector generation and ATE debug.
Contribute to overall DFT methodology/tooling for 28nm flow.
Contribute to SoC DFT SCAN, MBIST and JTAG architecture.
Contribute to SCAN, MBIST and JTAG timing constraints/analysis.
Requirements:

Strong understanding of DFT methodologies and tooling.
DFT experience on SoC’s with multiple scan chains and clocks.
SCAN chain implementation at chip and block level.
MBIST implementation at chip and block level.
JTAG implementation at chip level.
Gate simulation setup and debug.
Optional Experience:

Test mode timing constraint development and analysis is a plus.
Understanding of test compression and ATE debug is a plus.
DFT architecture experience is a plus.
Contact:

Uday

Mulya Technologies

“Mining the knowledge Community”

Email: muday_bhaskar@ yahoo.com

DFTSCANMBISTJTAGATEDRCATPGBISTBSCAN

AppliedMicro is an innovative global leader in system-on-a-chip semiconductors for high-speed communications and high-performance embedded processing. Leveraging 30 years of expertise, AppliedMicro products deliver an ideal combination of high-performance, low-power and low cost across optical transport, datacenter connectivity, enterprise, small-to-medium business and consumer markets. Combining both hardware and software, AppliedMicro offers advanced packet processing capabilities that enable rapid time to market, high-reliability, increased capacity and energy efficiency for the world"s leading equipment developers.

AppliedMicro is headquartered in Sunnyvale, Calif., with offices and research facilities in North America, Asia and Europe. The India offices are located in Bangalore and Pune. For more information about AppliedMicro, visit the company’s website at www.apm.com.

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Tags: ISP / ISP Services / Tele Communication / Telecom

DFT -Senior Staff / Staff Sunday, 27 March 2016 No Comment