Job Summary

Locations:

Bengaluru / Bangalore

Experience:

6 – 13 years

Keywords / Skills :

DFT, SCAN, MBIST, JTAG, ATE, DRC, ATPG, BIST, BSCAN, Vtran, Simutest

Function:

• IT
• Telecom/ ISP

Role:

• Team Leader/ Technical Leader
• Project Leader/ Project Manager
• Hardware Design Engineer
• Hardware Design Technical Leader

Industry:

• IT/ Computers – Hardware
• IT/ Computers – Software
• Telecom
• Semiconductor

Summary:

Our Client applies an open business model that enables the company to uniquely choose best-in-industry IP, design , tools, sw, packaging, mfg, and test capabilities.Complete understanding of DFT concepts and flow (Bscan/ATPG/MBIST,Vtran, Simutest

Posted On:

27th Jul 2016

Lead DFT Engineers
Location: Bangalore

No of Positions :2
Job Description: Candidates are expected to have good hands-on experience in the following areas:
Complete understanding of DFT concepts and flow (scan/ATPG/Memory BIST/ Bscan, Vtran/Simutest)
Develop/Plan complete DFT/test strategy for the device as per SOW
Create DFT implementation plan, delegate to team members and tracking
Test mode timing support/debug and closure at full chip level
Handle post-silicon pattern generation, Validation and ATE debug/support
DFT specification creation
Complete familiarity of tools used in DFT implementation (DC/RC, Tk/Tmax, Virage/Mentor memory BIST, Mentor Bscan) with expertize in one of them
Independently handle IP verification strategy and implement and verify the same
Good exposure to STA tool. Assist STA team in timing closure for DFT modes
Good scripting skills (TCL/Perl)
Familiarity with PD concepts/flow and assist PD team if and when required
Own full chip responsibilities
Interact with DM/FM, STA/PD/test/qual/customer team to communicate work progress and closure
Interact with tool vendors and debug tool related or IP related issues independently
Have foresight into execution. Create risk mitigation plan (RMP)
Participate in different project reviews. Conduct team meeting regularly
Generate/collect feedback from team members on project/tasks flow and initiate correction/improvement in methodology
Participate in Focal process

Contact:
Uday
Mulya Technologies
“Mining the knowledge Community”
Email: muday_bhaskar@ yahoo.com

DFTSCANMBISTJTAGATEDRCATPGBISTBSCANVtranSimutest

Our Client applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software, packaging, manufacturing, and test capabilities. The company has partnered with over 150 companies ranging from large semiconductor and systems manufacturers to high-profile start-ups, and has successfully completed 300 designs and shipped over 110 million ASICs to date. Privately-held, they employ over 250 people in Silicon Valley and around the world

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Tags: ISP / ISP Services / Tele Communication / Telecom

DFT- Lead Engineers Wednesday, 27 July 2016 No Comment